Over Horizon - Reproduction Cartridge
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Over Horizon is a nice little shmup that is getting a bit pricey (€80,- at time of writing). However it's possible to make a repro using a game with the same PCB. As it turns out there are quite a few quite crappy and very cheap games (less than €3,-) using the same HVC-TSROM-04 board. Throw in 2 recycled EPROMs (€2,-) and for €5,- you can get play on the real hardware, which as everyone knows is the only acceptable way to play these games (you know it's true, don't lie to me).
EPROM pinouts
Over Horizon needs 2 128K (E)EPROM (27C010), one for PRG and one for CHR. The difference between the EPROM and Mask ROM pinouts goes like this:
.----_----. .----_----. > VPP - |01 32| - VCC > A17 - |01 32| - VCC > A16 - |02 31| - A18 < .----_----. > /OE - |02 31| - /CE < A15 - |03 30| - A17 < A15 - |01 28| - VCC < A15 - |03 30| - VCC < A12 - |04 29| - A14 A12 - |02 27| - A14 A12 - |04 29| - A14 A7 - |05 28| - A13 A7 - |03 26| - A13 A7 - |05 28| - A13 A6 - |06 27| - A8 A6 - |04 25| - A8 A6 - |06 27| - A8 A5 - |07 26| - A9 A5 - |05 24| - A9 A5 - |07 26| - A9 A4 - |08 25| - A11 A4 - |06 23| - A11 A4 - |08 25| - A11 A3 - |09 24| - /OE < A3 - |07 22| - A16 < A3 - |09 24| - A16 < A2 - |10 23| - A10 A2 - |08 21| - A10 A2 - |10 23| - A10 A1 - |11 22| - /CE < A1 - |09 20| - /CE A1 - |11 22| - GND < A0 - |12 21| - D7 A0 - |10 19| - D7 A0 - |12 21| - D7 D0 - |13 20| - D6 D0 - |11 18| - D6 D0 - |13 20| - D6 D1 - |14 19| - D5 D1 - |12 17| - D5 D1 - |14 19| - D5 D2 - |15 18| - D4 D2 - |13 16| - D4 D2 - |15 18| - D4 GND - |16 17| - D3 GND - |14 15| - D3 GND - |16 17| - D3 '---------' '---------' '---------' 27C010 128K PRG 128K CHR
MMC3 pinouts
source: https://wiki.nesdev.com/w/index.php/MMC3_pinout
/ \ / O \ n/c -- /01 44\ -> CHR A16 (r) (r) CHR A10 <- /02 43\ -> CHR A11 (r) (n) PPU A12 -> /03 42\ -> PRG RAM /WE (w) (n) PPU A11 -> /04 41\ -> PRG RAM +CE (w) (n) PPU A10 -> /05 40\ -- GND GND -- /06 \ 39\ <- CPU D3 (nrw) (r) CHR A13 <- /07 \ 38\ <- CPU D2 (nrw) (r) CHR A14 <- /08 \ _\ 37\ <- CPU D4 (nrw) (r) CHR A12 <- /09 \ \| 36\ <- CPU D1 (nrw) (n) CIRAM A10 <- /10 \ \ 35\ <- CPU D5 (nrw) (r) CHR A15 <- /11 \ _\ o 34\ <- CPU D0 (nrw) (r) CHR A17 <- \12 /\ \| 33/ <- CPU D6 (nrw) (n) /IRQ <- \13 \ \ 32/ <- CPU A0 (nrw) (n) /ROMSEL -> \14 / \ 31/ <- CPU D7 (nrw) GND -- \15 |_ / 30/ -> PRG RAM /CE (w) n/c -- \16 | 29/ <- M2 (n) (n) R/W -> \17 |/ 28/ -- GND (r) PRG A15 <- \18 27/ -- VCC (r) PRG A13 <- \19 26/ -> PRG /CE (r) (n) CPU A14 -> \20 25/ -> PRG A17 (r) (r) PRG A16 <- \21 24/ <- CPU A13 (n) (r) PRG A14 <- \22 23/ -> PRG A18 (r) \ O / \ /